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Current Mirrors Beyond the Ratio: Compliance, Error, and Output Resistance

Why a correct W/L ratio is only the beginning of a dependable current mirror.

#current-mirror#biasing#headroom

The ideal mirror equation hides the two questions that matter most in a real bias network: how much voltage does the mirror need, and how much does its current move once that voltage changes?

First-order ratio

For matched devices in saturation and ignoring channel-length modulation,

IOUTIREF≈(W/L)OUT(W/L)REF.\frac{I_{OUT}}{I_{REF}} \approx \frac{(W/L)_{OUT}}{(W/L)_{REF}}.

This ratio is a starting point. Body effect, finite output resistance, device mismatch, and unequal drain voltages all perturb it.

Compliance voltage

A simple NMOS mirror needs enough output voltage to keep the output transistor in saturation:

VOUT,min≈VDS,sat≈VOV.V_{OUT,min} \approx V_{DS,sat} \approx V_{OV}.

The lowest expected output node voltage must therefore be part of the mirror specification. A cascode improves output resistance, but consumes additional headroom.

Finite output resistance

With channel-length modulation, the mirrored current changes with output voltage. The small-signal output resistance is roughly

ro≈1λID.r_o \approx \frac{1}{\lambda I_D}.

Longer devices generally reduce λ\lambda and improve current stability, while adding area and parasitic capacitance.

A useful verification plan

Sweep the output voltage across its full expected range and plot both output current and relative error. Repeat across PVT corners, then run Monte Carlo mismatch at the most sensitive operating points.

The relevant metric is not the nominal ratio at one voltage. It is the worst current error over the voltage range the circuit will actually visit.